The present invention relates to a semiconductor device and a process for fabricating the same, more specifically to a semiconductor device including capacitors and a process for fabricating the same.
A dynamic random access memory (DRAM) comprises memory cells each including one transfer transistor and one capacitor, which allows the DRAM to have a small area. This makes the DRAM a semiconductor device suitable for larger capacities. Because of the recent increased amounts of information processing of electronic devices, etc., DRAMS to be used in the electronic devices, etc. are required to be further micronized and have larger capacities. A DRAM having the cylindrical capacitors which will be described below are used.
A process for fabricating the conventional DRAM will be explained with reference to FIGS. 15A to 17. In FIGS. 15A to 17, the views on the left sides of the drawings are sectional views of the DRAM along a bit line, and sectional views of the DRAM along a word line are shown on the right sides of the drawings.
A device isolation film 112 is formed on the surface of a silicon substrate 110 by LOCOS (LOCal Oxidation of Silicon). Then, a gate oxide film (not shown) is formed on the surface of the silicon substrate 110. Next, a polysilicon film 114, a tungsten silicide film 116, a silicon oxide film 118, a silicon nitride film 120 and a silicon nitride oxide film 122 are sequentially formed on the entire surface by CVD (Chemical Vapor Deposition) to form a layer film 123 of these films.
Then, the layer film 123 is patterned into a prescribed shape to form gate electrodes 124 of the polycide structure of the polysilicon film 114 and the tungsten silicide film 116. The gate electrodes 124 function as the word lines also functioning as the gate electrodes of other transfer transistors extended vertically as viewed in the drawing on the left side of FIG. 15A.
Dopant ions are implanted in the silicon substrate 110 with the layer film 123 as a mask to form a source/drain diffused layer 126a, 126b by self-alignment with the layer film 123. Next, a silicon nitride film is formed on the entire surface and is subjected to anisotropic etching until the surfaces of the silicon substrate 110, the device isolation film 112 and the layer film 123 to form a sidewall insulation film 128 on the sidewalls of the layer film. The sidewall insulation film 128 is for forming an SAC (Self Aligned Contact) for ensuring a large margin for shift of the micronized contact. Then, an etching stopper film 130 of the silicon nitride film is formed on the entire surface.
Then, an inter-layer insulation film 132 of an about 0.5 xcexcm-thickness BPSG (Boro-Phospho-Silicate Glass) film is formed by CVD. Then, the surface of the inter-layer insulation film 132 is planarized by reflow and CMP (Chemical Mechanical Polishing). Next, contact holes 134 for exposing the source/drain diffused layer 126b are formed by self-alignment with the sidewall insulation film 128. Then, conductor plugs 136a are formed in the contact holes 134 (see FIG. 5A).
Next, an about 0.1 xcexcm-thickness silicon oxide film 138 is formed on the entire surface by CVD. Next, contact holes 140 for exposing the source/drain diffused layer 126a are formed by self-alignment with the sidewall insulation film 128. Then, a polysilicon film 142, a tungsten silicide film 144, a silicon oxide film 146, a silicon nitride film 148 and a silicon nitride oxide film 150 are sequentially formed by CVD on the entire surface to form a layer film 152 of these films. Then, the layer film 152 is patterned into a prescribed shape to form bit lines 154 of the polycide structure of the polysilicon film 142 and the tungsten silicide film 144 (FIG. 15B).
Next, a silicon nitride film is formed on the entire surface and is subjected to anisotropic etching until the surfaces of the silicon oxide film 138 and the layer film 152 are exposed, whereby a sidewall insulation film 156 is formed on the sidewalls of the layer film 152. Next, an inter-layer insulation film 160 is formed on the entire surface. Then, the surface of the inter-layer insulation film 160 is planarized by CMP. Then, an etching stopper film 161 of silicon nitride film is formed on the inter-layer insulation film 160 by CVD. Then, contact holes 162 for exposing the upper surfaces of the conductor plugs 136a are formed. Next, conductor plugs 136b are formed in the contact holes 162 (see FIG. 16A).
Next, an about 1.7 xcexcm-thickness BPSG film 164 is formed on the entire surface by CVD. Then, openings 166 for exposing the upper surfaces of the conductor plugs 136b are formed in the BPSG film 164. The openings 166 are for forming storage electrodes 168 (see FIG. 17) of capacitors 179 in a later step (FIG. 16B).
Next, an about 0.05 xcexcm-thickness polysilicon film is formed on the entire surface by CVD. Next, a resist film not shown is applied to the entire surface. Then, the polysilicon film and the resist film are polished by CMP until the surface of the BPSG film 164 is exposed. The storage electrodes 168 of the polysilicon film are formed inside the openings 166. Next, the BPSG film 164 is removed by HF-based wet etching with the etching stopper film 161 as a stopper.
Then, the resist film left on the inside of the storage electrodes 168 is removed by ashing. Next, an about 8 nm-thickness tantalum oxide film 172 is formed on the entire surface by CVD. The tantalum oxide film 172 functions as a dielectric of the capacitors 179. Next, a 0.05 xcexcm-thickness titanium nitride film 174 and a 0.1 xcexcm-thickness polysilicon film 176 are sequentially formed by CVD to form an opposed electrode 177 of the capacitors (see FIG. 17).
However, in the conventional DRAM fabrication process, when the BPSG film 164 is HF-based wet etching, it is often a case that the storage electrodes 168 are adversely peeled off the conductor plug 136b, or the etchant permeates near the upper surfaces of the conductor plugs 136b to adversely etch regions which should not be etched. This lowers yields of the DRAM.
In micronizing the DRAM it is necessary to increase a height of the capacitors so as to maintain substantially the same capacity of the capacitors. As a result, steps between each cell and its adjacent one is larger, which makes the formation of the contact holes and wirings difficult.
In the process for fabricating the conventional DRAM, a space must be ensured for the contacts between the gate electrodes of the transistors of peripheral circuits and the upper wirings, which hinders further micronization of the DRAM.
In the process for fabricating the conventional DRAM, the bit lines 154 are covered with a thick silicon nitride film of the high dielectric constant, which results in large parasitic capacities.
A first object of the present invention is to provide a semiconductor device and a process for fabricating the semiconductor device which can fabricate at high yields the semiconductor device even including cylindrical capacitors. A second object of the present invention is to provide a semiconductor device and a process for fabricating the semiconductor device which can realize space-savings for peripheral circuits. A third object of the present invention is to provide a semiconductor device and a process for fabricating the semiconductor device which can fabricate the semiconductor device having small parasitic capacities between the bit lines and the conductor plugs.
The above-described objects are achieved by a semiconductor device comprising: a first insulation film formed above a base substrate; a second insulation film formed on the first insulation film and having different etching characteristics from the first insulation film; and a capacitor including a storage electrode formed on the second insulation film, projected therefrom, the storage electrode being formed, extended downward from side surfaces of the second insulation film. The storage electrode can be securely fixed to the base, whereby the semiconductor device can be fabricated at high yields.
In the above-described semiconductor device it is preferable that the storage electrode is electrically connected to the base substrate through a conductor plug buried in the first insulation film.
The above-described objects are achieved by a semiconductor device comprising: a first insulation film formed above a base substrate; a second insulation film formed on the first insulation film and having different etching characteristics from the first insulation film; and a capacitor including a storage electrode formed on the second insulation film, projected therefrom, the storage electrode functioning as a conductor plug electrically connected to the base substrate.
In the above-described semiconductor device it is preferable that the storage electrode further includes a sidewall film on a side wall of an opening formed through the second insulation film, the sidewall film being formed of a material having different etching characteristics from the first insulation film. The storage electrode can be securely fixed to the base.
In the above-described semiconductor device it is preferable that the sidewall film is formed, extended downward from side surfaces of the second insulation film. The sidewalls film can be securely fixed to the base, which leads to secured fixation of the storage electrode to the base.
In the above-described semiconductor device it is preferable that the capacitor is in the shape of a cylinder which is projected from the second insulation film. The capacitors can have a large capacitance.
In the above-described semiconductor device it is preferable that the storage electrode is formed of a porous conductor film. The capacitors can have a large capacitance.
In the above-described semiconductor device it is preferable that the semiconductor device further comprising a wiring layer formed above the base substrate, wherein the insulation film between the wiring layer and the conductor plug is formed of a film having substantially uniform etching characteristics, and the conductor plug has a below 0.2 xcexcm-diameter. The first wiring layer and the conductor plugs can have small parasitic capacitances because the first wiring layer is micronized, and the sidewall insulation film is absent on the side surfaces of the first wiring layer.
In the above-described semiconductor device it is preferable that the semiconductor device further comprising a wiring layer formed above the base substrate, wherein the insulation film between the wiring layer and the conductor plug is formed of a film having substantially uniform etching characteristics, and the wiring layer has a below 0.2 xcexcm-width. The first wiring layer and the conductor plugs can have small parasitic capacitances because the first wiring layer is micronized, and the sidewall insulation film is absent on the side surfaces of the first wiring layer.
In the above-described semiconductor device it is preferable that the semiconductor device further comprising: a wiring layer formed above the base substrate; and a third insulation film formed on at least side surfaces of the wiring layer and having different etching characteristics from the first insulation film, wherein the first insulation film is formed also between the third insulation film and the conductor plug, and the conductor plug has a below 0.2 xcexcm-diameter. Voltage resistance between the wiring layer and the conductor plug can be ensured, whereby the semiconductor device can have higher reliability.
In the above-described semiconductor device it is preferable that the semiconductor device further comprising: a wiring layer formed above the base substrate; and a third insulation film formed on at least side surfaces of the wiring layer and having different etching characteristics from the first insulation film, wherein the first insulation film is formed also between the third insulation film and the conductor plug, and the wiring layer has a below 0.2 xcexcm-width. Voltage resistance between the wiring layer and the conductor plug can be ensured, whereby the semiconductor device can have higher reliability.
In the above-described semiconductor device it is preferable that the third insulation film is formed also on the upper surface of the wiring layer.
In the above-described semiconductor device it is preferable that the wiring layer is a bit line, and a width of the bit line is smaller than that of a word line. The bit lines are micronized, whereby the semiconductor device can have higher integration.
In the above-described semiconductor device it is preferable that the base substrate includes: a gate electrode of a transistor for a peripheral circuit, which is formed above a semiconductor substrate through a third insulation film; a fourth insulation film covering the upper surface and the side surfaces of the gate electrode; a fifth insulation film formed above the semiconductor substrate and the fourth insulation film, and having different etching characteristics from the fourth insulation film; a bit line formed on the fifth insulation film, and connected to a source/drain diffused layer of a transfer transistor through the fifth insulation film; and a wiring layer connected to the gate electrode through the fourth insulation film and the fifth insulation film, and formed of the same conductor layer as the bit line. The wiring layer can be directly connected to the gate electrodes of the transistors for peripheral circuits, whereby the semiconductor device can have higher integration.
The above-described objects are achieved by a process for fabricating a semiconductor device comprising the steps of: forming a first insulation film above a base substrate; forming on the first insulation film a second insulation film having different etching characteristics from the first insulation film; forming on the second insulation film a third insulation film having different etching characteristic from the second insulation film; forming a first opening which arrives at the first insulation film through the third insulation film and the second insulation film and arriving at a bottom of the second insulation film; forming a storage electrode on the inside wall of the first opening, the storage electrode being electrically connected to the base substrate; and etching the third insulation film with the second insulation film as an etching stopper. The storage electrode which reaches the bottom of the second insulation film can be formed, whereby the storage electrode can be securely fixed to the base. The semiconductor device can be fabricated at high yields.
In the above-described process for fabricating a semiconductor device it is preferable that in the step of forming the first insulation film, a conductor plug is formed, buried in the first insulation film, and in the step of forming the storage electrode, the storage electrode is formed, electrically connected to the base substrate through the conductor plug.
The above-described objects are achieved by a process for fabricating a semiconductor device comprising the steps of: forming a first insulation film above a base substrate; forming on the first insulation film a second insulation film having different etching characteristics from the first insulation film; forming in the second insulation film a first opening which arrives at the first insulation film; forming on the first insulation film and the second insulation film a third insulation film having different etching characteristics from the second insulation film; selectively etching the third insulation film and the first insulation film in a region containing the region where the first opening formed, with the second insulation film as an etching stopper to form a second opening in the third insulation film and to form a contact hole in the first insulation film; forming on inside walls of the second opening and in the contact hole a storage electrode electrically connected to the base substrate; and etching the third insulation film with the second insulation film as an etching stopper. The storage electrode is formed integral with the conductor plug, whereby the storage electrode is securely fixed to the base. The semiconductor device can be fabricated at high yields.
In the above-described process for fabricating a semiconductor device it is preferable that in the step of forming the first opening, the first opening is formed, arriving at a bottom of the second insulation film, the process for fabricating the semiconductor device further comprises, after the step of opening the first opening, a step of forming on inside walls of the first opening a sidewall film having different etching characteristics from the first insulation film, and in the step of forming the second opening and the contact hole, the third insulation film and the first insulation film are etched with the second insulation film and the sidewall film as an etching stopper. The conductor plugs can be micronized, whereby the semiconductor device can have higher integration.
In the above-described process for fabricating a semiconductor device it is preferable that in the step of forming the storage electrode, the storage electrode is formed of a porous conductor film. The etchant permeates the third insulation film through pores of the porous conductor film to thereby quickly etch the third insulation film around the storage electrodes. Accordingly, the third insulation film in the region except the cell portions can be left, and a step between the cell portions and the region except the cell portion can be small.
The above-described objects are achieved by a process for fabricating a semiconductor device comprising the steps of: forming a first insulation film above a base substrate; forming in the first insulation film a second insulation film having different etching characteristics from the first insulation film; forming on the second insulation film a first opening arriving at the first insulation film; forming on inside wall of the first opening a sidewall film having different etching characteristics from the first insulation film; etching the first insulation film with the second isolation film and the sidewall film as a mask to form a contact hole in the first insulation film; and forming a conductor plug in the contact hole. The conductor plugs can be formed, micronized. The semiconductor device can be fabricated at high yields.
In the above-described process for fabricating a semiconductor device it is preferable that further comprising, before the step of forming the first insulation film, the steps of: forming a first conductor film above the base substrate; forming on the first conductor film a photo-mask having a wiring pattern of a first width; etching the photo-mask to reducing the first width of the photo-mask to a second width which is smaller than the first width, and etching the first conductor film by using the photo-mask to form a bit line of the second width formed of the first conductor film above the base substrate. The bit lines can be micronized, whereby the semiconductor device can have higher integration.
In the above-described process for fabricating a semiconductor device it is preferable that further comprising, after the step for forming the bit line and before the step of forming the first insulation film, a step of forming at least on side surfaces of the bit line a fourth insulation film having different etching characteristics from the first insulation film. Voltage resistance between the bit lines and the conductor plugs can be ensured. The semiconductor device can have high reliability.
In the above-described process for fabricating a semiconductor device it is preferable that in the step of forming the fourth insulation film, the fourth insulation film is formed also on an upper surface of the bit line.
In the above-described process for fabricating a semiconductor device it is preferable that further comprising, before the step of forming the first insulation film, the steps of: forming a first wiring layer and a second wiring layer through the fourth insulation film above a semiconductor substrate; forming a fifth insulation film on an upper surface and side surfaces of the first wiring film, and an upper surface and side surfaces of the second wiring layer; forming above the semiconductor substrate and the fifth insulation film a sixth insulation film having different etching characteristics from the fifth insulation film; forming in the fifth insulation film and the sixth insulation film a first contact hole arriving at the first wiring layer; and forming in the sixth insulation film a second contact hole arriving at the base substrate by self-alignment with the fifth insulation film covering the second wiring layer. The first wiring layer and the upper wiring can be directly connected to each other through the first contact holes, whereby the semiconductor device can have higher integration.
In the above-described process for fabricating a semiconductor device it is preferable that further comprising, the steps of: after the step of forming the second contact hole, forming a first conductor film in the first contact hole and the second contact hole and on the sixth insulation film; and performing a heat treatment at a temperature of above 900 xc2x0 C. The first conductor film and the first wiring layer can have good contact with each other.